I’ve tried a few times now. I think there site is broken.
Did you create an account with Xilinx?
I’ll be at the space tonight if you want a second pair of eyes to look over it.
I made an account, but I wont be able to make it tonight sorry.
Just tried this myself with Win 7.1 x64 and latest Chrome browser. Web installer downloaded and started up just fine. Don’t think it’s the site.
Release notes mention Windows 10 Professional versions 1709 and 1803. Not sure if this is relevant.
Starting at www.xilinx.com and signed out state:
- Click “Support” link -> Support menu opens
- Click “Downloads & Licensing” -> Downloads page opens
- Click " Vivado HLx 2018.2: WebPACK and Editions - Windows Self Extracting Web Installer (EXE - 50.56 MB)" -> Sign In page opens in a new tab
- Enter user and password details and click button -> Download Centre - Name and Address verification page opens
- Enter/accept your details and the download begins
How far did you get through the above?
Ok if you have the installer could you leave a copy say on the printer machine desktop tonight, and I will collect it later?
Sorry Ian, am legally obliged to not share export controlled software. We will need to work through this and get your machine downloading under your credentials.
There is a wealth of knowledge in the Xilinx forum. Probably worth checking your machines date/time and timezone settings:
If date/time/timezone are set correctly then is there anything useful in the install log? The location is specified in the previous forum posting.
just a couple of quick reminders.
- The FPGA workshop is this coming Saturday
- Don’t forget to have Vivado installed BEFORE you get to the space
Am looking forward to seeing you there. This should be fun!
Had a blast today, great to have 8 participants.
Intend to update git with my hand wavy demo from the end in the next day or so.
How does August 4 suit for next session? Let me know.
have updated Github. Changes:
- Added 2018_cpu/docs/ws01.pdf - slides as presented
- Tag session_1 - template files if you missed something and want to have a crack at solving the problems yourself
- Tag session_1_soln - working solutions including the hand wavy program counter (PC) and PC + program ROM stuff
Next session will be detail work around sequential logic (flip flops, counters, latches, registers etc.), register file, AVR instruction formats (immediate and register-register), instruction decode/control signals.
Goal 1 is to get LDI (load immediate), AND (register/register AND) plus NOP (no-operation) working.
Goal 2 to is get the rest of the logical instructions (ANDI, OR, ORI, EOR, CLR etc.) and MOV working.
If the above sounds like gibberish then suggest you read up on:
- AVR instructions - https://www.microchip.com/webdoc/avrassembler/avrassembler.wb_instruction_list.html
- Excel spreadsheet in project docs folder
Last Saturday, as the session was breaking up, I mentioned to some of you that much of the processor design was taken from a text by Patterson & Hennessy. Details are in the workshop bibliography.
Installing Vivado so I can catch up before the next workshop Thanks for organising and running @sjdavies; I had a lot of fun in the workshop the other week.
Me too, in fact both at this workshop and earlier talk, had so much fun, I even got out my (electronic) wallet and made donation to MHV for the workshop.
Next workshop will be Sat August 4, 1-5 pm.
@admins, could someone with admin privileges please add FPGA Workshop #2 to the meet up and Facebook calendars please?
Saturday 4 August, 1-5PM: FPGA Workshop #2!
Hi Stephen, is there an agenda for this workshop? Please reply to Saturday 4 August, 1-5PM: FPGA Workshop #2! with more info - I’ve linked to that topic for more info for people to find
I’ve made placeholder events at:
And I see the Google calendar already had an entry.